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1:2 single-ended, low cost, active rf splitter ada4304-2 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007 analog devices, inc. all rights reserved. features ideal for catv and terrestrial applications excellent frequency response 1.6 ghz, ?3 db bandwidth 1 db flatness to 1.0 ghz low noise figure: 4.0 db low distortion composite second order (cso): ?62 dbc composite triple beat (ctb): ?72 dbc 1 db compression point of 8.25 dbm 2.8 db of gain per output channel 25 db output-to-output isolation, 50 mhz to 1000 mhz 75 input and outputs integrated output resistors small package size: 16-lead, 3 mm 3 mm lfcsp applications set-top boxes residential gateways catv distribution systems splitter modules digital cable ready (dcr) tvs functional block diagram vin vout2 vout1 gnd vcc 0.01f il 1h 5 v 5 v ada4304-2 0.01f 0.01f 0.1f 0.1f 06539-001 figure 1. general description the ada4304-2 is a 75 active splitter for use in applications where a lossless signal split is required. typical applications include multituner digital set-top boxes, cable splitter modules, multituner/digital cable ready (dcr) televisions, and home gateways where traditional solutions require discrete passive splitter modules with separate fixed gain amplifiers. the ada4304-2 is fabricated using analog devices, inc. proprietary silicon-germanium (sige), complementary bipolar process, enabling it to achieve very low levels of distortion with a noise figure of 4 db. the part provides a low cost alternative that simplifies designs and improves system performance by integrating a signal splitter element and a gain block into a single ic. the ada4304-2 is available in a 16-lead lfcsp and operates in the extended industrial temperature range of ?40c to +85c. ?8 ?7 ?6 ?5 ?4 ?3 ?2 ?1 0 1 2 3 4 100 50 1000 4000 t a = ?40c 06539-011 frequency (mhz) gain (db) t a = +85c t a = +25c figure 2. gain (s 21 , s 31 ) vs. frequency
ada4304-2 rev. 0 | page 2 of 12 table of contents features .............................................................................................. 1 applications....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications..................................................................................... 3 absolute maximum ratings............................................................ 4 thermal resistance ...................................................................... 4 esd caution.................................................................................. 4 pin configuration and function descriptions............................. 5 typical performance characteristics ..............................................6 test circuits........................................................................................8 applications........................................................................................9 circuit description .......................................................................9 evaluation boards .........................................................................9 rf layout considerations............................................................9 power supply..................................................................................9 outline dimensions ....................................................................... 11 ordering guide .......................................................................... 11 revision history 5/07revision 0: initial version
ada4304-2 rev. 0 | page 3 of 12 specifications v cc = 5 v, 75 system, t a = 25c, unless otherwise noted. table 1. parameter conditions min typ max unit dynamic performance bandwidth (?3 db) 1600 mhz specified frequency range 54 865 mhz gain (s 21 , s 31 ) f = 100 mhz; see figure 17 and figure 18 2.8 db 1 db gain flatness 1000 mhz noise/distortion performance noise figure 1 @ 54 mhz 4.0 db @ 550 mhz 4.5 db @ 865 mhz 4.6 db output ip3 f 1 = 97.25 mhz, f 2 = 103.25 mhz 26 dbm output ip2 f 1 = 97.25 mhz, f 2 = 103.25 mhz 44.5 dbm composite triple beat (ctb) 135 channels, 15 dbmv/channel, f = 865 mhz ?72 dbc composite second order (cso) 135 channels, 15 dbmv/channel, f = 865 mhz ?62 dbc cross modulation (cxm) 135 channels, 15 dbmv/channel, 100% modulation @ 15.75 khz, f = 865 mhz ?69 dbc input characteristics see figure 17 , figure 18 , and figure 19 input return loss (s 11 ) @ 54 mhz ?15 ?11 db @ 550 mhz ?35.5 ?22 db @ 865 mhz ?13.3 ?8 db output-to-input isolation (s 12 , s 13 ) either output, 54 mhz to 865 mhz @ 54 mhz ?32 ?30 db @ 550 mhz ?32 ?29 db @ 865 mhz ?33 ?31 db output characteristics see figure 17 , figure 18 , and figure 19 output return loss (s 22 , s 33 ) either output, 54 mhz to 865 mhz @ 54 mhz ?26.7 ?21 db @ 550 mhz ?22 ?15 db @ 865 mhz ?20 ?12 db output-to-output isolation (s 23 , s 32 ) either output, 54 mhz to 865 mhz db @ 54 mhz ?26.7 db @ 550 mhz ?25.1 db @ 865 mhz ?25 db 1 db compression (p 1db ) output referred, f = 100 mhz 8.25 dbm power supply nominal supply voltage 4.75 5.0 5.25 v quiescent supply current 88 105 ma 1 characterized with 50 noise figure analyzer.
ada4304-2 rev. 0 | page 4 of 12 absolute maximum ratings table 2. parameter rating supply voltage 5.5 v power dissipation see figure 3 storage temperature range ?65c to +125c operating temperature range ?40c to +85c lead temperature (soldering, 10 sec) 300c junction temperature 150c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the device (including exposed pad) soldered to a high thermal conductivity 2s2p circuit board, as described in eia/jesd 51-7. table 3. thermal resistance package type ja unit 16-lead lfcsp (exposed pad) 98 c/w maximum power dissipation the maximum safe power dissipation in the ada4304-2 package is limited by the associated rise in junction temperature (t j ) on the die. at approximately 150c, which is the glass transition temperature, the plastic changes its properties. even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ada4304-2. exceeding a junction temperature of 150c for an extended period can result in changes in the silicon devices, potentially causing failure. the power dissipated in the package (p d ) is essentially equal to the quiescent power dissipation; the supply voltage (v s ) times the quiescent current (i s ). in table 1 , the maximum power dissipation of the ada4304-2 can be calculated as p d (max) = 5.25 v 105 ma = 551 mw airflow increases heat dissipation, effectively reducing ja . in addition, more metal directly in contact with the package leads/exposed pad from metal traces, through-holes, ground, and power planes reduces the ja . figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 16-lead lfcsp (98c/w) on a jedec standard 4-layer board. 0 0 100 ambient temperature (c) maximum power dissipation (w) 06539-004 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 10 20 30 40 50 60 70 80 90 figure 3. maximum power dissipation vs. temperature for a 4-layer board esd caution
ada4304-2 rev. 0 | page 5 of 12 pin configuration and fu nction descriptions nc = no connect 1 vcc 2 vcc 3 gnd 4 vin 11 gnd 12 vout1 10 vout2 9gnd 5 g n d 6 g n d 7 g n d 8 n c 1 5 v c c 1 6 v c c 1 4 i l 1 3 n c 06539-002 ada4304-2 top view (not to scale) pin 1 indicator figure 4. pin configuration table 4. pin function descriptions pin o. nemonic description 1, 2, 15, 16 vcc supply pin 3, 5 to 7, 9, 11 gnd ground 4 vin input 8, 13 nc no connection 10 vout2 output 2 12 vout1 output 1 14 il bias pin
ada4304-2 rev. 0 | page 6 of 12 typical performance characteristics v cc = 5 v, 75 system, t a = 25c, unless otherwise noted. 06539-005 frequency (mhz) cso (dbc) 100 50 1000 ?74 ?72 ?68 ?70 ?66 ?62 ?58 ?60 ?64 ?56 ? 54 t a = +85c t a = +25c t a = ?40c figure 5. composite second order (cso) vs. frequency 100 50 1000 06539-007 frequency (mhz) ctb (dbc) ? 90 ? 87 ? 84 ? 81 ? 78 ? 75 ? 72 ? 69 ? 66 ? 63 ? 60 t a = +85c t a = +25c t a = ?40c figure 6. composite triple beat (ctb) vs. frequency 100 50 1000 06539-006 frequency (mhz) cxm (dbc) ? 90 ? 87 ? 84 ? 81 ? 78 ? 75 ? 72 ? 69 ? 66 ? 63 ? 60 t a = +85c t a = ?40c t a = +25c figure 7. cross modulation (cxm) vs. frequency 0 2 4 6 8 10 100 50 1000 t a = ?40c 06539-008 frequency (mhz) noise figure (db) t a = +25c t a = +85c 50 ? system figure 8. noise figure vs. frequency 20 25 30 35 40 45 50 55 60 100 50 1000 0 6539-009 frequency (mhz) output ip2 (dbm) figure 9. output ip2 vs. frequency 0 5 10 15 20 25 30 35 40 100 50 1000 0 6539-010 frequency (mhz) output ip3 (dbm) figure 10. output ip3 vs. frequency
ada4304-2 rev. 0 | page 7 of 12 ?8 ?7 ?6 ?5 ?4 ?3 ?2 ?1 0 1 2 3 4 100 50 1000 4000 t a = ?40c 06539-011 frequency (mhz) gain (db) t a = +85c t a = +25c figure 11. gain (s 21 , s 31 ) vs. frequency ?40 ?39 ?38 ?37 ?36 ?35 ?34 ?33 ?32 ?31 ? 30 100 50 1000 4000 0 6539-012 frequency (mhz) isolation (db) figure 12. output-to-input isolation (s 12 , s 13 ) vs. frequency ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 100 50 1000 4000 06539-013 frequency (mhz) isolation (db) `figure 13. output-to-output isolation (s 23 , s 32 ) vs. frequency ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 100 50 1000 0 6539-014 frequency (mhz) input return loss (db) figure 14. input return loss (s 11 ) vs. frequency ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 100 50 1000 06539-015 frequency (mhz) output return loss (db) figure 15. output return loss (s 22 , s 33 ) vs. frequency 70 75 80 85 90 95 ?60 ?50 ?40 ?30 ?20 ?10 0 10 20 30 40 50 60 70 80 90 100 06539-016 temperature (c) quiescent supply current (ma) figure 16. quiescent supply current vs. temperature
ada4304-2 rev. 0 | page 8 of 12 test circuits 06539-017 12 10 4 dut rf network analyzer 75 ? s-parameter test set port 2 vin port 1 vout2 port 3 vout1 75 ? figure 17. test circuit for s 11 , s 12 , s 21 , s 22 measurements 06539-018 12 10 4 dut rf network analyzer 75 ? s-parameter test set port 2 vin port 1 vout2 port 3 vout1 75 ? figure 18. test circuit for s 13 , s 31 , s 33 measurements 06539-019 12 10 4 dut rf network analyzer 75 ? s-parameter test set port 2 vin port 1 vout2 port 3 vout1 75 ? figure 19. test circuit for s 23 , s 32 measurements
ada4304-2 rev. 0 | page 9 of 12 applications the ada4304-2 active splitter is primarily intended for use in the downstream path of television set-top boxes (stbs) that contain multiple tuners. it is typically located directly after the diplexer in a bidirectional catv customer premise unit. the ada4304-2 provides a single-ended input and two single- ended outputs that allow the delivery of the rf signal to two different signal paths. these paths can include, but are not limited to, a main picture tuner, the picture-in-picture (pip) tuner, an out-of-band (oob) tuner, a digital video recorder (dvr), and a cable modem (cm). the ada4304-2 exhibits composite second order (cso) and composite triple beat (ctb) products that are ?62 dbc and ?72 dbc, respectively. the use of the sige bipolar process also allows the ada4304-2 to achieve a noise figure (nf) of 4 db. circuit description the ada4304-2 consists of a low noise buffer amplifier followed by a resistive power divider. this arrangement provides 2.8 db of gain relative to the rf signal present at the input of the device. the input and each output must be properly matched to a 75 environment for distortion and noise performance to match the data sheet specifications. ac coupling capacitors of 0.01 f are recommended for the input and outputs. a 1 h rf choke (coilcraft chip inductor 0805ls-102x) is required to correctly bias internal nodes of the ada4304-2. it should be connected between the 5 v supply and the il pin (pin 14). the choke should be placed as close as possible to the ada4304-2 to minimize parasitic capacitance on the il pin, which is critical for achieving the specified bandwidth and flatness. evaluation boards the ada4304-2 evaluation board allows designers to assess the performance of the parts in their particular application. the board includes 75 coaxial connectors and 75 controlled- impedance signal traces that carry the input and output signals. power (5 v) is applied to the red vcc loop connector, and ground is connected to the black gnd loop connector. figure 20 is a schematic of the ada4304-2 evaluation board. on the ada4304-2 evaluation board, connectors vo1 and vo4 are not populated. rf layout considerations appropriate impedance matching techniques are mandatory when designing circuit boards for the ada4304-2. improper characteristic impedances on traces can cause reflections that can lead to poor linearity. the characteristic impedance of the signal trace to the input and from each output should be 75 . any ground metal on the top surface near signal lines should be stitched with vias to the internal ground plane, as shown in figure 21 . power supply the 5 v supply should be applied to each of the vcc pins and rf choke via a low impedance power bus. the power bus should be decoupled to ground using a 10 f tantalum capacitor and a 0.1 f ceramic chip capacitor located close to the ada4304-2. in addition, the vcc pins should be decoupled to ground with a 0.1 f ceramic chip capacitor located as close to each of the pins as possible. ada4304-2 l1 1.0 h gnd v cc vo3 vin nc = no connect c2 0.01 f c4 0.01 f vo2 c3 0.01 f c5 10f + c1 0.1f 06539-003 c8 0.1f 1 vcc 2 vcc 3 gnd 4 vin 11 gnd 12 vout1 10 vout2 9 gnd 5 g n d 6 g n d 7 g n d 8 n c 1 5 v c c 1 6 v c c 1 4 i l 1 3 n c figure 20. evaluation board schematic
ada4304-2 rev. 0 | page 10 of 12 06539-020 figure 21. ada4304-2 evaluation board 06539-021 figure 22. evaluation board component layout
ada4304-2 rev. 0 | page 11 of 12 outline dimensions compliant to jedec standards mo-220-veed-2 1 0.50 bsc 0.60 max pin 1 indicator 1.50 ref 0.25 min 0.45 2.75 bsc sq top view 12 max 0.80 max 0.65 typ seating plane pin 1 indicato r 1.00 0.85 0.80 0.30 0.23 0.18 0.05 max 0.02 nom 0.20 ref 3.00 bsc sq 1.25 1.10 sq 0.95 16 5 13 8 9 12 4 (bottom view) exposed pa d 0.50 0.40 0.30 figure 23. 16-lead lead frame chip scale package [lfcsp_vq] 3 mm 3 mm body, very thin quad (cp-16-1) dimensions shown in millimeters ordering guide model temperature range package description pa ckage option ordering quantity branding ADA4304-2ACPZ-RL 1 ?40c to +85c 16-lead lfcsp_vq cp-16-1 5,000 h0z ada4304-2acpz-r7 1 ?40c to +85c 16-lead lfcsp_vq cp-16-1 1,500 h0z ada4304-2acpz-r2 1 ?40c to +85c 16-lead lfcsp_vq cp-16-1 250 h0z 1 z = rohs compliant part.
ada4304-2 rev. 0 | page 12 of 12 notes ?2007 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d06539-0-5/07(0)

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